ADC input scaling calculator
Scaling a voltage into an ADC is a divider plus a check that the source impedance is low enough for the sample-and-hold.
V
V
ohm
pF
microseconds
Top resistor
80 909ohm
- Divider ratio
- 0.110 000
- Source impedance seen by the ADC
- 8900 ohm
- Input resolution
- 7.3242 mV
- Settling time constant
- 0.0890 microseconds
- Time constants within the sample window
- 11.24
- Settles adequately Needs about 0.7 time constants per bit.
- 1
- Current through the divider
- 0.3300 mA
- Power dissipated
- 9.9000 mW
Show the working
- Maximum input voltage = 30
- ADC range = 3.3
- ADC bits = 12
- Bottom resistor = 10 000
- Sample and hold capacitance = 10
- Sampling time = 1
- Divider ratio = 30 > 0 ? 3.3/30 : 0 = 0.11
- Top resistor = 0.11 > 0 ? 10 000 * (1/0.11 - 1) : 0 = 80 909.1
- Source impedance seen by the ADC = (80 909.1 * 10 000) / (80 909.1 + 10 000) = 8900
- lsb_input = 30 / 2^12 = 0.007 324 22
- Input resolution = 0.007 324 22 * 1000 = 7.324 22
- Settling time constant = 8900 * 10 * 1e-12 * 1e6 = 0.089
- Time constants within the sample window = 0.089 > 0 ? 1/0.089 : 0 = 11.236
- Settles adequately = 11.236 >= 12 * 0.7 ? 1 : 0 = 1
- Current through the divider = 30 / (80 909.1 + 10 000) * 1000 = 0.33
- Power dissipated = 30^2 / (80 909.1 + 10 000) * 1000 = 9.9
Values are shown to six significant figures here; the arithmetic itself runs on exact fractions and is only rounded where a number is printed.
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The formula
- divider ratio = adc range / input range = Rb / (Rt + Rb)
- settling needs roughly 0.7 time constants per bit of resolution
A high-value divider saves power but raises source impedance and slows settling. A buffer amplifier solves both.
Add a capacitor at the ADC pin to supply the sampling charge locally; it relaxes the impedance requirement considerably.